Digital signal sampling in utilized in many different applications, such as signal (data, speech, video, etc.) processing, high-speed data converters, data communication devices, such as receivers and transmitters and the like.
A sampling rate refers to the frequency of the sampling. To allow a complete reconstruction of the signal being sampled from the discrete sampled data, the sampling rate must comply with the Nyquist theorem, which relies on the sampling occurring at uniform time steps. Nyquist frequency is defined as minimum required sampling frequency for a given signal frequency to allow a complete reconstruction of the signal and avoid aliasing. Accordingly, the sampling frequency has to be larger than the (sometimes twice, depending on the definition) Nyquist frequency.
However, at times, nonuniform digital signal samples are available, rather than uniform signal samples. If a signal to be sampled is sampled nonuniformly and periodically, some typical reconstruction methods may involve use of a filter bank structure. The conventional reconstruction methods require use of high speed analog-to-digital converters to satisfy Nyquist sampling criteria. For example, for a high bandwidth analog signal of 5.25 GHz or greater, conventional methods use a substantial number of relatively complex hardware components, including mixers, filters, amplifiers, and high speed analog-to-digital converters (ADC).
FIG. 1 shows a representative circuit for sampling a high bandwidth analog input signal, using a conventional parallel down conversion method. As shown, this approach employs 10 heterodyne down conversion stages and includes 10 mixers (102a-102j), 10 different frequency local oscillators (103a-103j), 10 low pas filters (104a-104j), 10 amplifiers (106a-106j) and 10 (mid-speed) ADCs (108a-108j) with a sampling frequency to 1.3 GHz. The outputs (109a-109j) of the 10 channels dare separately but identically processed to capture signals present within each segment of the original high bandwidth analog signal x(t) 101. Each of the 10 heterodyne down conversion stages include same components and operate identically.
As shown, the high bandwidth analog signal x(t) 101 is received, for example, by an antenna, and split into 10 down conversion stages. Within each of the ten split signal path, the signal is then mixed with unique local oscillators 103 by mixers 102. The mixed signals are filtered by low pass filters 104 and then amplified by amplifiers 106. The amplified signal are then converted to corresponding digital signals by the ADCs 108 and the digital outputs (109a-109j) of the 10 channels are then combined to reconstruct a digital signal representing the high bandwidth analog signal 101.
Typically, the mixers 102 use a non-linear component to produce both sum and difference signals, each including the modulation contained in the desired signal. The output of the mixer may include the original analog signal at fd (for example, 5.25 GHz), the local oscillator signal at fLO, and the two new frequencies fd+fLO and fd−fLO. The mixers may inadvertently produce additional frequencies such as 3rd- and higher-order intermodulation products. The undesired signals are removed by the low pass filters 104 leaving only the desired offset IF signal at fIF which contains the original modulation (transmitted information) as the received signal had at fd.
The stages of (IF) amplifiers 106 are typically tuned to a particular frequency not dependent on the receiving frequency to simplify optimization of the circuit. The IF amplifiers 106 may be made highly selective around their center frequencies fIF. By tuning the frequency of the local oscillator fLO, the resulting difference frequency fLO−fd (or fd−fLO) are matched to the amplifiers' frequencies fIF for the desired reception frequency fd. The resulting signals are then converted to corresponding digital signals by corresponding ADCs 108 with a sampling frequency substantially lower than that of the high bandwidth analog signal (5.25 GHz). However, this circuit is complex and includes many components, which makes it costly as well.
FIG. 2 illustrates an alternative sampling circuit for sampling a high bandwidth analog input signal, according to the conventional methods. As depicted, this approach employs a single high speed ADC 202 to convert the high bandwidth analog signal 201 (e.g., 5.25 GHz) to a corresponding digital signal 203 with uniform samples. The high speed ADC 202 must have a Nyquist frequency of at least twice the frequency of the analog input signal 201, that is a minimum of 10.5 GS/s, for this example. Accordingly, the high speed ADC suffers from low dynamic range. That is, limitation of the sample-hold settling time, accuracy/stability, and noise contribute to issues within ADCs which restrict dynamic range achievable for very high speed ADCs.
The conventional methods use a substantial number of heterodyne down conversion stages and/or high speed ADCs to maintain a wide bandwidth for spectral reconstruction. Both of the above conventional approaches suffer from a tradeoff between high sampling rate and large dynamic range, or multiplicity of the components and complexity of the resulting circuit.